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Perhaps it's obvious but I'm missing some (briefly) justification why FlatBuffers was better, not Protobuf/Capnproto/...

> 300+ on my Mac.

"Firefox power user kept 7,500 tabs open for two years" (04.08.2024)

https://news.ycombinator.com/item?id=41156568


I currently have 20,097 tabs open in one browser profile. The oldest tab appears to be an HN post from 2.5 years ago, which must be the last time I swept tabs into bookmarks.

I used to sweep them more regularly, but Firefox + Sidebery don't even break a sweat with 20K tabs, apparently, so why bother?

The only downside is that it takes about 15 seconds for the browser to launch. I restart the browser whenever Firefox or macOS is updated, so every week or two.


> about 15 seconds for the browser to launch

I also have many tabs (that's why I could quickly recall and find the post). Restoring session takes a while (much more than 15 seconds). I measure this time by looking on the CPU consumption. Only once it drops to near zero I consider session completely restored.


I just timed it for accuracy. When launched alone, on my M2 MBA, it's about 18 seconds to full draw of visible tab list, and 29 seconds to snappy interactivity. I didn't check CPU utilization.

Usually, when I launch this 20+Kt profile, I also launch 2-3 other profiles simultaneously (work 2Kt, personal/misc 3Kt, sometimes commerce 400t). I've noticed that they each peg a core while launching, but this is the only one that isn't ready quickly.


Same here. Used FF+Sidebery (and Tab Center Reborn before that) for years. ~5k tabs and it worked perfectly. With Chromium/Brave I can open maybe a hundred before the browser croaks and takes up all available memory.

I don't open heavy websites in FF, though. For youtube links, I always use Brave.


> memory, PCIe etc (≈southbridge?)

northbridge


To further expand on this, "southbridge" is what we now call a chipset expander (or 50 other company or product line specific names).

Its a switch that has a bunch of unified PHYs that can do many different tasks (non-primary PCI-E lanes, SATA ports, USB ports, etc), leveraging shared hardware to reduce silicon footprint while increasing utility, and connects to PCI-E lanes on the CPU.


Don’t EPYC CPUs avoid using a chipset altogether? I think in that case, it would be NB+SB.

Yes.

The "northbridge" in modern Zen systems is the IO die, and in Zen 1/+, its the tiny fractional IO die that was colocated on each chip (which means a Zen 1/+ Epyc had the equivalent of 4 tiny northbridges).

However, they just embed the equivalent design of the chipsets into the IO Die SoC on Epycs.

Fun fact: For desktop, since Zen 1 (and AM4-compatible non-Zen CPUs) they included a micro-southbridge into the IO die. It gave you 2 SATA ports and 4 USB ports, usually the only "good" ones on the board. On Epyc, they just put the full sized one here instead of pairing it with an external one.

This also means, for example, if you have 4 USB3 10gbit ports, and its not handled by a third party add-on chip? Those are wired directly into the CPU, and aren't competing for the x4 that feeds the southbridge.

Also fun fact: The X, B, and A chips are all sibling designs, under the name of Promontory, made jointly with ASMedia. They're essentially all identical, only updated for PCI-E and USB versions as time went on, as well as adding more ports and shrinking die size.

The exception is the X570, its an AMD-produced variant of the Promontory that also contains the Zen 2/3 IO Die, as they're actually the same chip in this case. The chips that failed to become IO Dies had all their Promontory features enabled instead, and became chipset chips. The Zen 2/3 Epycs shipped their IO die, at least partly, as two X570s welded together, with even more DDR PHY thrown in, as some sort of cost saving.

I don't think that panned out, because the X/B/A 600 and 800 variants (Zen 4 and 5) went back to being straight Promontory again.

Wikipedia has some good charts for this: https://en.wikipedia.org/wiki/List_of_AMD_chipsets


Since more than a year no images available. Now the page gone completely: https://developer.microsoft.com/en-us/windows/downloads/virt...

> CPU is limited by its memory bandwidth for streaming tasks

That must be the reason, why EPYC 9175F exists. It is only 16-core CPU, but all 16 8-core CCDs are populated and only one core on each is active.

The next gen EPYC is rumored to have 16 instead of 12 memory channels (which were 8 only 4-5 years ago).


This also leaves more power & thermal allowance for the IO Hub on the CPU chip and I guess the CPU is cheaper too.

If your workload is mostly about DMAing large chunks of data around between devices and you still want to examine the chunk/packet headers (but not touch all payload) on the CPU, this could be a good choice. You should have the full PCIe/DRAM bandwidth if all CCDs are active.

Edit: Worth noting that a DMA between PCIe and RAM still goes through the IO Hub (Uncore on Intel) inside the CPU.


But such working cars from home will not be certified to participate at the public traffic and remain toys for driving on own private property.

No, it is possible to register a homemade car for use on public roads, pretty commonly done actually.

Then I'm surprised. It's much different to the usual situation when even mass made products are either banned or very limited, e.g. unicycles prohibited, e-scooters only up to 20 km/h, e-bikes only up to 25 km/h.

Regarding 3D made parts recently there was an accident: https://news.ycombinator.com/item?id=46152941. One may expect increasing regulation. At least in the air.


I agree, it's surprising. Even in California of all places, you can make a one-off vehicle at home and register it for legal road use, without even needing modern safety or emissions equipment:

https://www.jalopyjournal.com/forum/threads/registering-as-a...

Another even more common strategy is to "restore" a classic car using some extremely small number of parts from some really old pre-emissions and pre-safety equipment car. This is often done for hod rods, dune buggies, etc. where it will be, say a "1930 Ford" but contain only some minuscule amount of that original car it is titled and registered as. There's a sizable industry of homemade "kit cars" that require you to start with a legally registered VW Beetle, but ultimately they often retain nothing except parts of the thin sheet metal floor pan, and somehow that is apparently legal.


A protocol is not a software, it is needed for interoperability.

Similar with header files. Issues arise if there is a "misuse" to derive actually not a compatible but competing solution.


> If an LLM can outperform an offshore team at a fraction of the cost,..

And "a few moments later" happens the same as with those "cost effective" clouds.

[1] https://www.heise.de/en/news/IDC-Many-companies-want-partly-...

[2] https://www.idc.com/resource-center/blog/storm-clouds-ahead-... (original)


in the end, it all comes down to roi; if spending x dollars a month brings in an additional 5x revenue then its gonna be worth?

then again, i have some suspicion that alot of consumer-focused end products using llms in the backend (hello chatbots) expecting big returns for all those tokens spent may have some bad news coming... if the bubble starts popping i'm guessing it starts there...


Since at least October 2003 on Debian:

[1] "debhelper: support for split debugging symbols"

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=215670

[2] https://salsa.debian.org/debian/debhelper/-/commit/79411de84...


And Qimonda (Infineon/Siemens) - DRAM manufacturer. They could have prioritized EU for supply.


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